1. Field
One or more example embodiments relate to high electron mobility transistors (HEMTs), methods of manufacturing the same, and electronic devices including HEMTs.
2. Description of the Related Art
Various typical electronic apparatuses such as power conversion systems or motor driving systems as well as various industrial facilities require a device for controlling flow of an electric current through ON/OFF switching operations, that is, a power device. In a typical power conversion system, efficiency of the entire system may be dependent upon the efficiency of the power device.
Power devices that are currently commercialized are mostly power metal-oxide-semiconductor field-effect transistors (MOSFETs) or insulated gate bipolar transistors (IGBTs) which are based on silicon (Si). However, it is generally difficult to increase the efficiency of the silicon-based power device due to limitations in physical properties of the silicon and in manufacturing processes. In order to overcome the above limitations among others, research for increasing conversion efficiency by applying group III-V based compound semiconductor to a power device is being conducted. In this regard, high electron mobility transistors (HEMTs) using a heterojunction structure of compound semiconductors have drawn attention. In order to efficiently use an HEMT in various electronic devices, it may be preferable to improve or adjust the characteristics of the HEMT. In particular, it may be desirable to improve or adjust an on-current level, a threshold voltage, and the like of the HEMT. SUMMARY
At least one example embodiment includes high electron mobility transistors (HEMTs) having excellent operating characteristics.
One or more example embodiments include HEMTs having a normally-off characteristic and a low on-resistance.
One or more example embodiments include HEMTs having an excellent withstand voltage characteristic.
One or more example embodiments include HEMTs capable of restraining a gate leakage current.
One or more example embodiments include HEMTs capable of adjusting characteristics to be suitable for purposes.
One or more example embodiments include methods of manufacturing the HEMTs.
One or more example embodiments may include electronic devices (for example, a power device among other electronic devices) including the HEMTs.
Additional example embodiments will be set forth in part in the description which follows and, in part, will be apparent from the description, or may be learned by practice of the presented example embodiments.
According to one or more example embodiments, a high electron mobility transistor (HEMT) may include, among other elements: a first semiconductor layer; a second semiconductor layer disposed on the first semiconductor layer, the second semiconductor layer inducing a two-dimensional electron gas (2DEG) in the first semiconductor layer; an impurity containing layer disposed on the second semiconductor layer and containing p-type impurities; a gate disposed on the impurity containing layer; and a source and a drain separated from the gate and electrically connected to at least one of the first semiconductor layer and the second semiconductor layer, wherein the impurity containing layer includes a first region corresponding to the gate and a second region disposed at an opposite side of the first region, the first region includes an impurity region that is activated to generate holes and the second region comprises a non-activated impurity region, and a depletion region is formed by the activated impurity region in a region of the 2DEG corresponding to the activated impurity region.
According to at least one example embodiment, a hydrogen content of the first region of the impurity containing layer may be lower than a hydrogen content of the second region.
According to at least one example embodiment, a work function of the first region of the impurity containing layer may be greater than a work function of the second region.
According to at least one example embodiment, an electric resistance of the second region of the impurity containing layer may be higher than an electric resistance of the first region.
According to at least one example embodiment, the first semiconductor layer may include a gallium nitride-based material.
According to at least one example embodiment, the second semiconductor layer may have a single-layered or multi-layered structure including at least one material selected from nitrides containing at least one of aluminum (Al), gallium (Ga), indium (In), and boron (B).
According to at least one example embodiment, the impurity containing layer may include a group III-V based nitride.
According to at least one example embodiment, the p-type impurities may include, for example, magnesium (Mg).
According to at least one example embodiment, the first region of the impurity containing layer may have a constant doping concentration.
According to at least one example embodiment, the first region of the impurity containing layer may have a doping level that is changed laterally.
According to at least one example embodiment, the first region of the impurity containing layer may have a width that is greater than a width of the gate.
According to at least one example embodiment, the first region and the second region of the impurity containing layer may have the same thickness as each other.
According to at least one example embodiment, the first region of the impurity containing layer may have a thickness that is greater than a thickness of the second region.
According to at least one example embodiment, the HEMT may be a normally-off device.
According to one or more example embodiments, an electronic device, for example, a power device, may include the HEMT.
According to one or more example embodiments, a high electron mobility transistor (HEMT) may include, among other elements: a first semiconductor layer; a second semiconductor layer disposed on the first semiconductor layer, the second semiconductor layer inducing a two-dimensional electron gas (2DEG) in the first semiconductor layer; a gate corresponding to a portion of the second semiconductor layer; a source and a drain separated from the gate and electrically connected to at least one of the first semiconductor layer and the second semiconductor layer; and a depletion forming element disposed between the gate and the second semiconductor layer and configured to form a depletion region in the 2DEG, wherein the depletion forming element may include a plurality of regions, and properties of the plurality of regions may be changed in a horizontal direction.
According to at least one example embodiment, the depletion forming element may include a group III-V based nitride and p-type impurities doped in the group III-V based nitride.
According to at least one example embodiment, the plurality of regions of the depletion forming element may have different doping levels from each other.
According to at least one example embodiment, the depletion forming element may include a first doped region and a second doped region, the second doped region may be closer to the drain than the first doped region is, and the doping level of the second doped region may be lower than the doping level of the first doped region.
According to at least one example embodiment, the depletion forming element may have a width that is the same as or greater than a width of the gate.
According to at least one example embodiment, the HEMT may further include a material layer including non-activated impurities on the second semiconductor layer at opposite sides of the depletion forming element.
According to one or more example embodiments, an electronic device, for example, a power device, may include the HEMT.
According to one or example more embodiments, a method of manufacturing a high electron mobility transistor (HEMT) includes: forming a first semiconductor layer; forming a second semiconductor layer on the first semiconductor layer, wherein the second semiconductor layer induces a two-dimensional electron gas (2DEG) in the first semiconductor layer; forming an impurity containing layer including p-type impurities on the second semiconductor layer; forming an activated region by selectively activating a first region of the impurity containing layer, wherein a region of the 2DEG is depleted by the activated region; forming a gate on the activated region in a state where non-activated region remains in the impurity containing layer at opposite sides of the activated region; and forming a source and a drain separated from the gate and electrically connected to at least one of the first semiconductor layer and the second semiconductor layer.
According to at least one example embodiment, selectively activating the first region of the impurity containing layer may include: locating a mask having an opening exposing the first region on the impurity containing layer; and irradiating a laser onto the first region via the opening of the mask.
According to at least one example embodiment, the mask may be separated from the impurity containing layer.
According to at least one example embodiment, the mask may contact the impurity containing layer.
According to at least one example embodiment, the first semiconductor layer may include a gallium nitride-based material.
According to at least one example embodiment, the second semiconductor layer may have a single-layered or multi-layered structure including at least one material selected from nitrides containing at least one of aluminum (Al), gallium (Ga), indium (In), and boron (B).
According to at least one example embodiment, the impurity containing layer may include a group III-V based nitride.
According to at least one example embodiment, the p-type impurities may include magnesium (Mg).
According to at least one example embodiment, the activated region may include a plurality of regions having different doping levels, and the plurality of regions having different doping levels may be arranged in a horizontal direction.
According to at least one example embodiment, the plurality of regions having the different doping levels may be formed by using a plurality of masks.
According to at least one example embodiment, the activated region may be formed to have a width that is the same as or greater than a width of the gate.
According to at least one example embodiment, the method may further include removing a partial thickness of the non-activated region at the opposite sides of the activated region, after forming the activated region.
Additional advantages and novel features of these example embodiments of the invention will be set forth in part in the description that follows, and in part will become more apparent to those skilled in the art upon examination of the following or upon learning by practice of the invention.